SDRT2
| SDRT2 Release status: experimental [box doku] | |
|---|---|
| Description | use the VGA port to transmit I/Q signals on any frequency |
| Author(s) | siro (siro) |
| Last Version | 0.1 () |
| License | GPL |
Software Defined Radio Transmitter
Description
Hardware to transmit anything on any frequency. That means any information / modulation can be transmited on a channel between 100 and 2400 Mhz, which is the possible internal PLL frequency-range for ADRF6755. The I/Q signals are feed through a VGA-compatible 15pole-DSUB connector.
This board is intended to be used with VGAtoBaseband.
While SDRT was configured using auf teensy this board is connected to the VGA i2c and can be controlled from any Software that has access to this bus.
The board has a 50Ohms SMA connector transmitting about 0dBm using VGA signals (0.7Vpp).
[[Datei:|thumb]]
Board
Overview
- VGA DSUB connector, baseband input
- power jack DC 6 - 7 V > 600mA
- 2 LEDS
- power
- todo
- SMA connector, rf output
- switch (rf disable/enable)
Clock
26 Mhz TCXO +-2 ppm 1.8V
Low pass
The low pass is critical as it phaseshifts the high frequencies. All three channels are terminated using 75 Ohms.
SPI
The SPI interface should have series resistance of more than 50 Ohms.
ADRF6755
- reference design
- internal vco and pll is used
- LO path is disabled
- input multiplier 1:1
- internal LO divider 1:4
- fin: 26Mhz ac coupled
- lo output freq:
fout = fin / 4 * ( INT + (mod / frac) ) where: INT, MOD, FRAC are register values
hf Power amplifier
Layout
todo