1541 im FPGA/en: Unterschied zwischen den Versionen

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[[Bild:fpgafloppy_0.jpg|left|100px]]
[[Bild:fpgafloppy_0.jpg|left|100px]]
Finally I (tixiv) brought myself to start a project with my Xilinx Spartan-3 FPGA Board. Jörg (our FPGA master) joined me instantly and so we are going to re-build a 1541 floppy drive (as in those good old C64) in an FPGA.
Finally I (tixiv) started a project with my Xilinx Spartan-3 FPGA Board. Jörg (our FPGA master) joined me instantly and so we started building a 1541 floppy drive (the drive of the good old C64) in an FPGA.


[[Bild:fpgafloppy_1.jpg|right|100px]] The floppy is not about some stupid piece of scrap metal, it is a autonomous microprocessor system controlled by a 6502 processor. Our idea is to implement it as true to the original as possible in VHDL, except that it will be reading data from a MMC card (on which might fit all C64 games ever available), not a floppy disk.
[[Bild:fpgafloppy_1.jpg|right|100px]] The floppy is not some stupid piece of scrap metal, it is an autonomous microprocessor system controlled by a 6502 processor. Our idea is to implement it as true to the original as possible in VHDL, except that it will be reading data from a MMC card (which might fit all C64 games ever available), instead of a floppy disk.
At the moment of writing, the microprocessor system does boot, but we do not have a virtual floppy disk yet and the C64 is not yet connected.
At the moment of writing, the microprocessor system does boot, but we do not have a virtual floppy disk yet and the C64 is not yet connected.


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Short update:
Short update:
The floppy is quasi finished. The VHDL implementation works with all the fastloaders we tested (incl. Jiffydos and Action Replay Modul). Next to the floppy's PU (running at 1MHz) there a second 6502 running at 16MHz in our design. This second PU loads the data from the MMC card for the floppy emulation.
The floppy is quasi finished. The VHDL implementation works with all the fastloaders we tested (incl. Jiffydos and the Action Replay Modul). Next to the floppy's CPU (running at 1MHz) there is a second 6502 running at 16MHz in our design. This second CPU loads the data from the MMC card into the virtual disk for the floppy emulation.


At boot the controlling CPU uses a small bootloader to read its own firmware from the MMC. The firmware loads the floppy ROM from the memory card to the Spartan board's RAM. Now the virtual floppy has booted. Using the Spartan boards graphic LCD and buttons, you can select a D64 image for the 16MHz CPU to load to a virtual floppy disk, which is then readable for the floppy emulation.
At boot the controlling CPU uses a small bootloader to read its own firmware from the MMC. The firmware loads the floppy ROM from the memory card to the Spartan board's RAM. Now the virtual floppy is booted. Using a graphic LCD and buttons, you can select a D64 image for the 16MHz CPU to load to the virtual floppy disk, which is then readable for the emulated floppy.


There is one thing still missing: after writing to the virtual floppy disk there is no way to transfer the altered image back to the MMC card. Have to fix it in a quiet moment...
There is one thing still missing: after writing to the virtual floppy disk there is no way to transfer the altered image back to the MMC card. Have to fix this in a quiet moment...


[[Kategorie:FPGA]]
[[Kategorie:FPGA]]

Aktuelle Version vom 9. September 2007, 22:34 Uhr

Fpgafloppy 0.jpg

Finally I (tixiv) started a project with my Xilinx Spartan-3 FPGA Board. Jörg (our FPGA master) joined me instantly and so we started building a 1541 floppy drive (the drive of the good old C64) in an FPGA.

Fpgafloppy 1.jpg

The floppy is not some stupid piece of scrap metal, it is an autonomous microprocessor system controlled by a 6502 processor. Our idea is to implement it as true to the original as possible in VHDL, except that it will be reading data from a MMC card (which might fit all C64 games ever available), instead of a floppy disk.

At the moment of writing, the microprocessor system does boot, but we do not have a virtual floppy disk yet and the C64 is not yet connected.

More to come....

Short update: The floppy is quasi finished. The VHDL implementation works with all the fastloaders we tested (incl. Jiffydos and the Action Replay Modul). Next to the floppy's CPU (running at 1MHz) there is a second 6502 running at 16MHz in our design. This second CPU loads the data from the MMC card into the virtual disk for the floppy emulation.

At boot the controlling CPU uses a small bootloader to read its own firmware from the MMC. The firmware loads the floppy ROM from the memory card to the Spartan board's RAM. Now the virtual floppy is booted. Using a graphic LCD and buttons, you can select a D64 image for the 16MHz CPU to load to the virtual floppy disk, which is then readable for the emulated floppy.

There is one thing still missing: after writing to the virtual floppy disk there is no way to transfer the altered image back to the MMC card. Have to fix this in a quiet moment...